PUBLICATIONS

Books:

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1. K. Tatas , K. Siozios, D. Soudris, Axel Jantch, "Designing 2D and 3D Network-on-Chip Architectures", Springer, 2013

Book Chapters:

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1. K. Tatas , K. Siozios, D. Soudris, "Survey of Fine-Grain Reconfigurable Architectures and Processors", in "Fine - and Coarse-Grain Reconfigurable Computing", Springer, 2007

2. D. Soudris, K. Tatas , K. Siozios, G. Koutroumpezis, S. Nikolaidis, S. Siskos, N. Vasiliadis, V. Kalenteridis, H. Pournara and I. Pappas, "AMDREL: A Novel Low-Energy FPGA Architecture and Supporting CAD Tool Design Flow" , in "Fine - and Coarse-Grain Reconfigurable Computing", Springer , 2007

Publications in International Journals:

1. Ahmad Al-Zoubi, Konstantinos Tatas and Costas Kyriacou, "Fuzzy classification of OpenCL programs targeting heterogeneous systems" , Journal of Intelligent & Fuzzy Systems, vol. 39, no. 5, pp. 7189-7202 IOS Press, 2020, DOI: 10.3233/JIFS-200616

2. K. Tatas and C. Chrysostomou, "Hardware Implementation of Dynamic Fuzzy Logic Based Routing in Network-on-Chip", Microprocessors and Microsystems: Embedded Hardware Design, Special Issue on Euromicro Conference on Digital System Design , 2016, Elsevier, 2017

3. S. Arandi, G. Matheou, C, Kyriacou, P. Evripidou, “Data-Driven Thread Execution on Heterogeneous Processors”, International Journal of Parallel Programming,  doi :10.1007/s10766-016-0486-6, Dec. 2017

4. K. Tatas , K. Siozios , A. Bartzas , C. Kyriacou and D. Soudris, "A Novel Prototyping and Evaluation Framework for NoC-based MPSoC" , Networked Embedded Systems: Special Issue International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), IGI-Global , 2012

5. K. Tatas , C. Kyriacou, P. Evripidou, P. Trancoso and Stefan Wong, "Rapid Prototyping of the Data-Driven Chip Multiprocessor (D - CMP) using FPGAs" , Parallel Processing Letters, VOL 18; NUMB 2, pages 291-306, World Scientific , 2008

6. K. Stavrou, C. Kyriacou, P. Evripidou, and P. Trancoso, "Chip Multiprocessor based on Data-Driven Multithreading Model", International Journal of High Performance Systems Architecture (IJHPSA),Vol. 1.Issue 1, pp.34-43, (2007), (Invited Paper). 

7. C. Kyriacou, P. Evripidou, P. Trancoso, “Data Driven Multithreading using Conventional Microprocessors”, IEEE Transactions on Parallel Computer Systems, Vol.17, No. 10, pp 1176 – 1188, October 2006.

8. P. Trancoso, P. Evripidou, K. Stavros, C. Kyriacou, “A Case for Chip Multiprocessors based on the Data-Driven Multithreading Model”, International Journal of Parallel Programming,  Vol. 34, No. 3, pp 213 – 235, June 2006.

9. C. Kyriacou, P. Evripidou, P. Trancoso, “CacheFlow: Cache Optimizations for Data Driven Thread Sequencing”, Parallel Processing Letters, Vol. 16, No. 02, pp 229 – 244, June 2006.

 

Publications in International Conferences and Workshops:

1. Ahmad Al-Zoubi and Konstantinos Tatas , “Rapid High-Level FPGA Resource Estimation for a Novel Heterogeneous Platform Scheduling Scheme”, 11th International Conference on Information and Communication Systems (ICICS 2020), April 7-9, 2020, Irbid, Jordan

2. Sotiris Panagi, Antonis Antoniou, Isabelle Chrysanthou-Baustert, Demetris Kaolis, Ourania Demetriadou, Costas Kyriacou, and Yiannis Parpottas, “Controlled Thoracic Motions of an Anthropomorphic Phantom for Myocardial Perfusion Imaging”, MEDICON 2019, IFMBE Proceedings 76, pp. 1–8, 2020. https://doi.org/10.1007/978-3-030-31635-8_86

3. A. Al-Zoubi, K. Tatas and C. Kyriacou, "Towards Dynamic Multi-task Scheduling of OpenCL Programs on Emerging CPU-GPU-FPGA Heterogeneous Platforms: a Fuzzy Logic Approach" , Proc of 10th IEEE International Conference on Cloud Computing Technology and Science (CloudCom 2018) , 10-13 December 2018, Nicosia, Cyprus

4. Konstantinos Tatas, "High-performance 3D NoC bufferless router with approximate priority comparison", 7th International Conference on Modern Circuits and Systems Technologies (MOCAST 2018), Thessaloniki, Greece, May 2018

5. A. Al-Zoubi, K. Tatas and C. Kyriacou, "Design space exploration of the KNN imputation on FPGA", in 7th International Conference on Modern Circuits and Systems Technologies (MOCAST), Thessaloniki, Greece, May 2018

6. K. Tatas, S. Savva and C. Kyriacou, "3DBUFFBLESS: A Novel Buffered-Bufferless Hybrid Router for 3D Networks-on-Chip", in 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2017), September 25-27, Thessaloniki, Greece

7. K. Tatas and C. Chrysostomou, "Adaptive Networks-on-Chip Routing with Fuzzy Logic Control", Proceedings of the Euromicro Conference on Digital System Design (DSD 2016), August 31 - September 2, 2016, Limassol, Cyprus

8. George Matheou, Costas Kyriacou, and Paraskevas Evripidou. “Data-Driven execution of the Tile LU Decomposition”, 6th Workshop on Data-Flow Execution Models for Extreme Scale Computing (DFM 2016) in conjunction with PACT2016, Haifa, Sept.2016,

9. G. Matheou, P. Evripidou and C. Kyriacou, "Paradigm Shift for EXASCALE Computing", 3rd International Conference on Exascale Applications and software (EASC 2015), Edinburgh, UK, April 2015

10. K. Tatas , S. Savva and C. Kyriacou, "Low-Cost Fault-Tolerant Routing for Regular Topology NoCs" , in 21st IEEE International Conference on Electronics Circuits & Systems (ICECS 2014) , Marseille, France, December 7-10, 2014

11. P. Evripidou, C. Kyriacou, “Data-Flow vs Control-Flow for Extreme Level Computing”, 3rd Workshop on Dataflow Models for Extreme Scale Computing (DFM-2013) in conjunction with PACT2013”, Edinburgh, Scotland, Sept. 2013

12. C. Chrysostomou, K. Tatas and A. R. Runcan, "A Dynamic Fuzzy Logic Based Routing Scheme for Bufferless NoCs" , in 10th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing , 5-7 December 2012, Paphos, Cyprus

13. K. Tatas and C. Chrysostomou, "A Novel Fuzzy Logic-Based Bufferless Routing Algorithm for Low-Power NoCs" in Proc. of DATICS-BCFIC 2012, Vilnius, Lithuania, 25-27 April 2012

14. K. Tatas, C. Kyriacou, K. Siozios, A. Bartzas and D. Soudris, "SYSMANTIC: A 3D NoC MPSoC Architecture Exploration and Implementation Framework", Design Automation and Test in Europe (DATE 2012), 3D Integration Workshop" Applications, Technology, Architecture, Design, Automation, and Test, 16/3/2012, Dresden, Germany

15. S. Arandi, G. Michael, C, Kyriacou, P. Evripidou, “Combining Compile and Run-time Dependency Resolution in Data-Driven Multithreading”, 1st Workshop on Dataflow Models for Extreme Scale Computing (DFM-2011) in conjunction with PACT2011”, Edinburgh”, Texas, USA, Oct. 2011

16. K. Tatas and C. Kyriacou, "Implementation of a Threaded Dataflow Multiprocessor using FPGAs", Proc. of the 6th International conference on Design & Technology of Integrated Systems in nanoscale era (DTIS'11), 6-8 April 2011, Athens, Greece

17. K. Tatas, C. Kyriacou, A. Bartzas, K. Siozios and D. Soudris, "A Novel NoC Architecture Framework for 3D Chip MPSoC Implementations", 3D Integration Workshop, Design Automation and Test in Europe (DATE 2010), 12/3/2010

18. K. Tatas, C. Kyriacou, G. Dekoulis, D. Demetriou, C. Avraam, and N. Christou, "Cache-Aware Network-on-Chip for Multiprocessor SoC", Proc. of SPIE Europe Microtechnologies for the new millennium, 4-6 May 2009, Dresden, Germany

19. K. Tatas and D. Soudris, "A Dynamically-Reconfigurable Motion Estimation IP Core for Adaptive Multimedia Systems", in Proc. of IFIP VLSI-SoC 2008, 13-15 October, 13-15 October 2008, Rhodes Island, Greece

20. K. Tatas, C. Kyriacou, S. Wong, P. Trancoso and P. Evripidou, "Rapid Prototyping of the Data-Driven Multithreading Chip-Multiprocessor using FPGAs", in Proc. of 2nd HiPEAC Reconfigurable Computing Workshop 2008, January 27, 2008, Goteborg, Sweden